NPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Name Description
1 NC Not connection, this pin should be open.
2 NC Not connection, this pin should be open.
3 NC Not connection, this pin should be open.
4 GND Ground
5 RX0- Negative LVDS differential data input. Channel 0
6 RX0+ Positive LVDS differential data input. Channel 0
7 GND Ground
8 RX1- Negative LVDS differential data input. Channel 1
9 RX1+ Positive LVDS differential data input. Channel 1
10 GND Ground
11 RX2- Negative LVDS differential data input. Channel 2
12 RX2+ Positive LVDS differential data input. Channel 2
13 GND Ground
14 RXCLK- Negative LVDS differential clock input.
15 RXCLK+ Positive LVDS differential clock input.
16 GND Ground
17 RX3- Negative LVDS differential data input. Channel 3
18 RX3+ Positive LVDS differential data input. Channel 3
19 GND Ground
20 NC Not connection, this pin should be open.
21 NC Not connection, this pin should be open.
22 NC Not connection, this pin should be open.
23 GND Ground
24 GND Ground
25 GND Ground
26 Vcc +5.0V power supply
27 Vcc +5.0V power supply
28 Vcc +5.0V power supply
29 Vcc +5.0V power supply
30 Vcc +5.0V power supply
Note (1) Connector Part No.: 093G30-B0001A(STARCONN) or MSCKT2407P30HA (STM )
Note (2) Mating Wire Cable Connector Part No.: FI-X30H(JAE) or FI-X30HL(JAE)
Note (3) Mating FFC Cable Connector Part No.: 217007-013001 (P-TWO) or JF05X030-1 (JAE)
Note (4) The first pixel is odd.
Note (5) Input signal of even and odd clock should be the same timing.
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