/*****************************************************
This program was produced by the
CodeWizardAVR V2.03.4 Standard
Automatic Program Generator
 Copyright 1998-2008 Pavel Haiduc, HP InfoTech s.r.l.
http://www.hpinfotech.com

Project :
Version :
Date    : 24.05.2010
Author  :
Company :
Comments:


Chip type           : ATtiny2313
Clock frequency     : 4,000000 MHz
Memory model        : Tiny
External RAM size   : 0
Data Stack size     : 32
*****************************************************/
typedef  unsigned char byte ;
#pragma optsize+
#include <tiny2313.h>
#include <delay.h>
#include <bcd.h>

#define a 32
#define b 128
#define c 2
#define d 8               //     
#define e 16
#define f 64
#define g 1
#define DP 4
#define minus Dig[10]
#define grad  Dig[11]
#define probel Dig[12]

   //Array Symbol image


 byte  Dig[13],        ind [8],  // indicator image

          i   ,     // Number symbol on display

          number_razr [8] ,  // data razryadow-zajiganie

          ustan_pinow [8];   // config registra d  nawix chto gorit ,oct na wxod

   void Dig_init()
 {

  Dig[0] = (a+b+c+d+e+f);   //       
  Dig[1] = (b+c);
  Dig[2] = (a+b+g+e+d);
  Dig[3] = (a+b+g+c+d);
  Dig[4] = (f+g+b+c);
  Dig[5] = (a+f+g+c+d);
  Dig[6] = (a+f+g+c+d+e);
  Dig[7] = (a+b+c);
  Dig[8] = (a+b+c+d+e+f+g);
  Dig[9] = (a+b+c+d+f+g);
  Dig[10] = (g);
  Dig[11] = (a+b+f+g);
  Dig[12]=  0;

  number_razr [0]  = ~16;
  number_razr [1]  = ~1;
  number_razr [2]  = ~2;     //  - 0
  number_razr [3]  = ~32;
  number_razr [4]  = 16 ;    //   - 1
  number_razr [5]  = 1   ;
  number_razr [6]  = 2   ;
  number_razr [7]  = 32;


   ustan_pinow [0]=16;
   ustan_pinow [1]=1;
   ustan_pinow [2]=2;
   ustan_pinow [3]=32;       //  DDR
   ustan_pinow [4]=16;
   ustan_pinow [5]=1;
   ustan_pinow [6]=2;
   ustan_pinow [7]=32;


  }
                // Timer 0 overflow interrupt service routine
 interrupt [TIM0_OVF] void timer0_ovf_isr(void)
  {
   DDRB=255;

    // Reinitialize Timer 0 value
  TCNT0=0xF7;
  if (i< 4)
  {
    PORTB=ind[i];   // i-       - 1    0  3-
  }

 else
   {
   PORTB=~ind[i];   // i-        - 0    4-  7
   }

    DDRD= ustan_pinow [i];
    PORTD= number_razr [i] & 0b00110011 ; //     i- 

  i++ ;                    //  increment
  if (i>7) i=0;          //    if last symbol

 }


              // 1 Wire Bus functions
 #asm
   .equ __w1_port=0x12 ;PORTD
   .equ __w1_bit=6
 #endasm
   #include <1wire.h>
#include <ds18x20_v2.h>

#define MAX_DS18b20 2

byte ds18b20_devices;

byte ds18b20_rom_codes[MAX_DS18b20][9];


                  void main(void)             //  
 {

 unsigned int temp[2];

  byte n , tempb, initResult, sign[2] ; //             - 



   Dig_init();


             // Crystal Oscillator division factor: 1
  #pragma optsize-
  CLKPR=0x80;
  CLKPR=0x00;
  #ifdef _OPTIMIZE_SIZE_
  #pragma optsize+
  #endif

           // Timer/Counter 0 initialization
         // Clock source: System Clock
        // Clock value: 3,906 kHz
       // Mode: Normal top=FFh
      // OC0A output: Disconnected
      // OC0B output: Disconnected
  TCCR0A=0x00;
  TCCR0B=0x05;
  TCNT0=0xF7;
  OCR0A=0x00;
  OCR0B=0x00;

                        // Timer(s)/Counter(s) Interrupt(s) initialization
 TIMSK=0x02;

 #asm("cli")

   initResult = w1_init();

   ds18b20_devices=w1_search(0xf0,ds18b20_rom_codes);

 #asm("sei")


    ind[1]=Dig[ds18b20_devices];
    ind[0]=probel;
    ind[4]=probel;
    ind[2] = Dig[initResult];

               // Determine the number of DS1820 devices

delay_ms (5000);
ind[0]=grad , ind[4]= grad ;
ind[3]=probel;
      ind[7]=probel;

while (1)
  {
       delay_ms (10000);

     for(n=0; n < ds18b20_devices; n++)
     {

         #asm("cli")                                                                     //   2- 
        temp[n]=ds18b20_temperature(&ds18b20_rom_codes[n][0]) ;
         #asm("sei")

      }


       delay_ms (10000);


    for(n=0; n < ds18b20_devices; n++)
    {
     #asm("cli")
                                                                           //   2- 
      temp[n]=ds18b20_temperature(&ds18b20_rom_codes[n][0]) ;
      #asm("sei")

      }







   for (n=0; n < ds18b20_devices; n++)
    {

      if (temp[n]==0x1000)
        { //    1000
                temp[n]=0;

         if (n==0)
           {

            ind[3]=probel;
            ind[2]=probel;                        //  
            ind[1]=Dig[0];

           }
          else
             {                                                   //       T =0

             ind[7]=probel;
             ind[6]=probel;
             ind[5]=Dig[0];
            }
         }
      else

      {

          sign[n]=0;

         if (temp[n] > 0x1000)

          {                                 //    1000
            temp[n] =4096-temp[n];
            sign[n]=1;           //   4096



               }

            //   ""

           else
           {
            if (n==0)
               {
                 ind[2]=probel;
                 ind[3]=probel;
               }

            else
             {
                ind[6]=probel;
                ind[7]=probel;
              }

             }

         if ((temp[n] & 0x000F) >= 0x0008)
            temp[n] = (temp[n] >> 4) + 1;
         else                                        //      
            temp[n] = (temp[n] >> 4);

         tempb = bin2bcd((char) temp[n]);

         if (n == 0)
         {
            ind[1] = Dig[(tempb & 0x0F)];

            if ((tempb >> 4) == 0)

              {
               if
                   (sign[n]==1)
                         ind[2]=minus;
                else
                         ind[2]=probel;
               }

            else

              {
                 ind[2]=Dig[(tempb >> 4)];

                 if (sign[n]==1)
                         ind[3]=minus;
                  else
                      ind[3]=probel;
              }

         }

         else

          {

            ind[5] = Dig[(tempb & 0x0F)];

            if ((tempb >> 4) == 0)

              {
                if
                    (sign[n]==1)
                         ind[6]=minus;
                else
                    ind[6]=probel;
               }


            else

              {
                ind[6]=Dig[(tempb >> 4)];

                   if

                       (sign[n]==1)
                              ind[7]=minus;
                   else

                        ind[7]=probel;


             }
          }
      }








    }
   }
 }
/*****************************************************
Date    : 28.10.2010
Chip type               : ATtiny26
AVR Core Clock frequency: 4,000000 MHz
Memory model            : Tiny
External RAM size       : 0
Data Stack size         : 32
*****************************************************/
typedef  unsigned char byte ;
typedef  unsigned int  real ;
#include <tiny26.h>
//#include <bcd.h>
#include <delay.h>

#define a 1
#define b 2
#define c 4
#define d 8               //     
#define e 16
#define f 32
#define g 64
#define en dig[10]    // H
#define pe  dig[11]   // 
#define er dig[12]    // P
#define we dig[13]          // B
#define ye    dig[14]             // E
#define de   dig[15]                // d

#define show_enpeer 1   //     
#define show_wepeer 2     //      
#define show_weerye 3       //       
#define show_enwek  4         //        d
#define show_wewek  5           //         d
#define show_umin   6             //            
#define show_umax   7               //         
#define show_dumin_on 8                 //         
#define show_dumax_on 9                   //     
#define show_ondelay 10                       //   
#define show_timer   11                 //     
#define show_uadc      12                 //   

#define  min_up    PINA.2==1        //          
#define  min_down  PINA.2==0          //

#define  plus_up   PINA.4=1            //      
#define  plus_down PINA.4=0              //

byte dig[17],    // 0-9    0-9        d
     number_razr[3],   // 0-, 1- , 2 - 
      ind[3] ,         //  
       morg ,      //    0-no mig 1-mig
       rele=254 ,  //    off=254 on=255
    //    bud_timer,   //  
         meny    ,                //  ,    ,    show_enpeer  show_uadc
         zahvat_meny , //1  0 - 0      ,    
                        // 0    in , 1-    .
          tik,          //  ++  0.2 
          zap_timer=0 , // 1- 0-
          adc_input=1;

 byte blink=0,n=0,i=0,k=0;       //      , -     Static

real
      ondelay,        //    
         time,          //  

        umin,          //      
           umax,         //            
             dumin_on,        //                 
                dumax_on,       //                      
                      uadc ,    //                           
                 umin_on,      //     
                 umax_on,
                  bud_timer;   //                ;      //


eeprom real
          ust_umin=100,          //      
              ust_umax=260,         //            
                 ust_dumin_on=5,        //                 
                   ust_dumax_on=5,       //                      
               ust_ondelay=10;    //

   void eeprom_to_ram ()
      {
        umin=ust_umin ;          //      
           umax=ust_umax;              //            
             dumin_on=ust_dumin_on ;        //                 
                dumax_on=ust_dumax_on ;        //                      
                ondelay = ust_ondelay   ;     //       
             umin_on = umin + dumin_on ;
             umax_on=umax - dumax_on ;
      }

    void ram_to_eeprom ()
       {
          ust_umin=umin;          //      
              ust_umax=umax;             //            
                 ust_dumin_on=dumin_on;        //                 
                   ust_dumax_on= dumax_on;          //                      
                      ust_ondelay=ondelay;               //
        }

   void dig_init()            //     
 {
  dig[0] = (a+b+c+d+e+f);   //       
  dig[1] = (b+c);
  dig[2] = (a+b+g+e+d);
  dig[3] = (a+b+g+c+d);
  dig[4] = (f+g+b+c);
  dig[5] = (a+f+g+c+d);
  dig[6] = (a+f+g+c+d+e);
  dig[7] = (a+b+c);
  dig[8] = (a+b+c+d+e+f+g);
  dig[9] = (a+b+c+d+f+g);
  dig[10] = (b+c+e+f+g);                    // H
  dig[11] = (a+b+c+d+e+f);                 // 
  dig[12] = (a+b+e+f+g);                 // P
  dig[13] = (c+d+e+f+g);                   // B
  dig[14] = (a+d+e+f+g);                  // E
  dig[15] = (a+b+c+d+e+g);              // d
   dig[16] = 0     ;
  number_razr [0]  = ~128;     // 
  number_razr [1]  = ~64;      // 
  number_razr [2]  = ~32;     //                         - 0
 }

  void bcd (real num )       //              
  { byte i=0;

     if (num>=1000 ) num=999;
     while (num>=100)
       { num=num-100;
          i++;
       }

     if(i==0) ind[2]=dig[16]; else ind[2]=dig[i];
      i=0;
     while (num>=10)
       { num=num-10;
          i++;
       }
     if((i==0)& (ind[2]==dig[16])) ind[1]=dig[16]; else ind[1]=dig[i];
      ind[0]=dig[(byte) num];
  }

 void show (byte name_bookmark)         //   =   

 {  switch (name_bookmark)
     {case show_enpeer : {ind[2]=en;ind[1]=pe;ind[0]=er;break;}
      case show_wepeer : {ind[2]=we;ind[1]=pe;ind[0]=er;break;}
      case show_weerye : {ind[2]=we;ind[1]=er;ind[0]=ye;break;}
      case show_enwek  : {ind[2]=de;ind[1]=en;ind[0]=we;break;}
      case show_wewek  : {ind[2]=de;ind[1]=we;ind[0]=we;break;}
      case show_umin   :  {bcd(umin);break; }
      case show_umax   :  {bcd(umax);break; }
      case show_dumin_on: {bcd(dumin_on);break;}
      case show_dumax_on: {bcd(dumax_on);break;}
      case show_ondelay : {bcd(ondelay);break; }
      case show_timer    : {bcd(bud_timer ); break;  }
      case show_uadc    : {bcd(uadc ); break;  }
   //   case :
     // case :

      default :;}
 }

// Timer 0 overflow interrupt service routine
interrupt [TIM0_OVF] void timer0_ovf_isr(void)
{
   TCNT0=0xEB;                       //Reinitial timer
 #asm  ( "wdr")               // Watchdog reset

  if (n<40 )
              blink=0;
    if (n>=40)
              blink =255;
                               n++;

   if (n==80)
               { n=0; tik++;show(meny);   //  0.2       meny
                      ADCSR|=0X40 ;}     // START ADC

 if  (morg==1)
             PORTB=ind[i]&blink;
 else
             PORTB=ind[i] ;
 PORTA=  number_razr [i]&rele ;
                                i++ ;
 if (i==3)
           i=0;

 if (zap_timer==1)
 {
    if  (k<150) k++ ;
     if  (k>=150 )
        {  k=0;                           //    zap_timer=1   bud_timer ,   0
         if (bud_timer>0)
                          bud_timer -- ;
       }
 }
 DDRA=0xE1;
}

//unsigned int adc_data;
#define ADC_VREF_TYPE 0x80

// ADC interrupt service routine
 interrupt [ADC_INT] void adc_isr(void)
{
// #asm("cli")
                                  // Read the AD conversion result
//adc_data=ADCW>>1;
 uadc=ADCW>>1;

if ((uadc<=umin)||(uadc>=umax))
   {  rele=254;
      if (zahvat_meny==0){ meny=show_uadc;  morg=1;}

      zap_timer=0;
      bud_timer=ondelay;
    //  #asm("sei")
      return;
    }
if ((umin_on <= uadc <= umax_on) && (bud_timer|=0))
   {  rele=254;
     // bud_timer=ondelay;
      if (zahvat_meny==0) {meny=show_timer;morg=0;}

      zap_timer=1;
  //    #asm("sei")
      return;
    }


if ((umin_on <= uadc <= umax_on) && (bud_timer==0))
    {  rele=255;
       zap_timer=0;
       if (zahvat_meny==0) {meny=show_uadc;   morg=0;}

 //   #asm("sei")
    return;}
return;
}
/*
// Read the AD conversion result
// with noise canceling
unsigned int read_adc(unsigned char adc_input)
{
ADMUX=adc_input  | (ADC_VREF_TYPE & 0xff);
// Delay needed for the stabilization of the ADC input voltage
delay_us(10);
#asm
    in   r30,mcucr
    cbr  r30,__sm_mask
    sbr  r30,__se_bit | __sm_adc_noise_red
    out  mcucr,r30
    sleep
    cbr  r30,__se_bit
    out  mcucr,r30
#endasm
return adc_data;

}
*/
// Declare your global variables here

void main(void)
{
// Declare your local variables here

// Input/Output Ports initialization
// Port A initialization
// Func7=Out Func6=Out Func5=Out Func4=In Func3=In Func2=In Func1=In Func0=Out
// State7=1 State6=1 State5=1 State4=P State3=P State2=P State1=T State0=0
PORTA=0xFC;
DDRA=0xE1;

// Port B initialization
// Func7=In Func6=Out Func5=Out Func4=Out Func3=Out Func2=Out Func1=Out Func0=Out
// State7=P State6=0 State5=0 State4=0 State3=0 State2=0 State1=0 State0=0
PORTB=0x80;
DDRB=0x7F;

// Timer/Counter 0 initialization
// Clock source: System Clock
// Clock value: 3,906 kHz
TCCR0=0x05;
TCNT0=0xEB;

// Timer(s)/Counter(s) Interrupt(s) initialization
TIMSK=0x02;

// ADC initialization
// ADC Clock frequency: 500,000 kHz
// ADC Voltage Reference: Int., AREF discon.
ADMUX=/* ADC_VREF_TYPE & 0xff;*/ 1;
ADCSR=0x8B;

// Watchdog Timer initialization
// Watchdog Timer Prescaler: OSC/512k
WDTCR=0x0D;

// Global enable interrupts

dig_init();
eeprom_to_ram ();
bud_timer=ondelay;





#asm("sei")
while (1)
      { zahvat_meny=0;

      // Place your code here
   //   if (bud_timer==0 ) bud_timer=255;uadc=bud_timer;
     // if (PINA.4==0){ morg=0;meny=show_uadc;zap_timer=1;}
     //    time=bud_timer;
   //   if (PINA.2==0) { zahvat_meny=1;morg=1;meny=show_timer;zap_timer=1;}

      }
}
/*****************************************************
Date    : 28.10.2010
Chip type               : ATtiny26
AVR Core Clock frequency: 4,000000 MHz
Memory model            : Tiny
External RAM size       : 0
Data Stack size         : 32
*****************************************************/
typedef  unsigned char byte ;
typedef  unsigned int  real ;
#include <tiny26.h>
//#include <bcd.h>
#include <delay.h>

#define a 1
#define b 2
#define c 4
#define d 8               //     
#define e 16
#define f 32
#define g 64
#define en dig[10]    // H
#define pe  dig[11]   // 
#define er dig[12]    // P
#define we dig[13]          // B
#define ye    dig[14]             // E
#define de   dig[15]                // d

#define show_enpeer 1   //     
#define show_wepeer 2     //      
#define show_weerye 3       //       
#define show_enwek  4         //        d
#define show_wewek  5           //         d
#define show_depewe  6                  //  d
#define show_umin   7            //            
#define show_umax   8               //         
#define show_ondelay 9                       //   
#define show_dumin_on 10                 //         
#define show_dumax_on 11                  //     
#define show_d_uadc    12                //   
#define show_timer   13                 //     
#define show_uadc      14                 //   
#define  show_temp      15                // 

#define  min_up    (PINA.2==1 )       //          
#define  min_down ( PINA.2==0)          //

#define  plus_up  ( PINA.4==1    )        //      
#define  plus_down  (PINA.4==0     )         //

byte /* dig[17],    // 0-9    0-9        d
     number_razr[3],   // 0-, 1- , 2 -    */
      ind[3] ,         //  
       morg ,      //    0-no mig 1-mig
       rele=254 ,  //    off=254 on=255
    //    bud_timer,   //  
         meny    ,                //  ,    ,    show_enpeer  show_uadc
         zahvat_meny , //1  0 - 0      ,    
                        // 1    in , 0-    .
          tik,          //  ++  0.2 
          on_tik,       //  tik
          zap_timer=0 ; // 1- 0-


byte dig[] = {
  (a+b+c+d+e+f),   //       
  (b+c),
  (a+b+g+e+d),
  (a+b+g+c+d),
  (f+g+b+c) ,
  (a+f+g+c+d) ,
   (a+f+g+c+d+e) ,
  (a+b+c)       ,
 (a+b+c+d+e+f+g),
  (a+b+c+d+f+g)  ,
   (b+c+e+f+g)   ,                 // H
 (a+b+c+d+e+f) ,                // 
 (a+b+e+f+g)   ,              // P
  (c+d+e+f+g)   ,                // B
   (a+d+e+f+g)    ,              // E
   (a+b+c+d+e+g)  ,            // d
    0      } ;

    /*
byte dig[](
  dig[0] = (a+b+c+d+e+f),   //       
  dig[1] = (b+c),
  dig[2] = (a+b+g+e+d),
  dig[3] = (a+b+g+c+d),
  dig[4] = (f+g+b+c) ,
  dig[5] = (a+f+g+c+d) ,
  dig[6] = (a+f+g+c+d+e) ,
  dig[7] = (a+b+c)       ,
  dig[8] = (a+b+c+d+e+f+g),
  dig[9] = (a+b+c+d+f+g)  ,
  dig[10] = (b+c+e+f+g)   ,                 // H
  dig[11] = (a+b+c+d+e+f) ,                // 
  dig[12] = (a+b+e+f+g)   ,              // P
  dig[13] = (c+d+e+f+g)   ,                // B
  dig[14] = (a+d+e+f+g)    ,              // E
  dig[15] = (a+b+c+d+e+g)  ,            // d
   dig[16] = 0      )                   // 
   */

 byte number_razr[] = {
  ~128  ,   // 
   ~64  ,    // 
  ~32  } ; //  

 byte blink=0,n=0,i=0,k=0;       //      , -     Static

real
    temp,
     umax,
       umax_on,                          //            
         uadc ;    //                           
 byte
      var_dig,     //   
            bud_timer,   //  
            ondelay,        //    
              umin,          //      
             dumin_on,        //                 
                dumax_on,       //                      
               d_uadc,          // 
                 umin_on;      //     



eeprom byte
          ust_umin=100,          //      
            ust_d_uadc =95 ,           //              
                 ust_dumin_on=5,        //                 
                   ust_dumax_on=3,       //                      
                     ust_ondelay=20;    //
eeprom real ust_umax=260 ;

   void eeprom_to_ram ()
      {
        umin=ust_umin ;          //      
           umax=ust_umax;              //            
             dumin_on=ust_dumin_on ;        //                 
                dumax_on=ust_dumax_on ;        //                      
                ondelay = ust_ondelay   ;     //       
             umin_on = umin + dumin_on ;
             umax_on=umax - dumax_on ;
              d_uadc=ust_d_uadc ;
      }

    void ram_to_eeprom ()
       {
          ust_umin=umin;          //      
              ust_umax=umax;             //            
                 ust_dumin_on=dumin_on;        //                 
                   ust_dumax_on= dumax_on;          //                      
                      ust_ondelay=ondelay;               //
                  ust_d_uadc = d_uadc;
        }

 /*  void dig_init()            //     
 {
  dig[0] = (a+b+c+d+e+f);   //       
  dig[1] = (b+c);
  dig[2] = (a+b+g+e+d);
  dig[3] = (a+b+g+c+d);
  dig[4] = (f+g+b+c);
  dig[5] = (a+f+g+c+d);
  dig[6] = (a+f+g+c+d+e);
  dig[7] = (a+b+c);
  dig[8] = (a+b+c+d+e+f+g);
  dig[9] = (a+b+c+d+f+g);
  dig[10] = (b+c+e+f+g);                    // H
  dig[11] = (a+b+c+e+f);                 // 
  dig[12] = (a+b+e+f+g);                 // P
  dig[13] = (a+b+c+d+e+f+g);                   // B
  dig[14] = (a+d+e+f+g);                  // E
  dig[15] = (b+c+d+e+g);              // d
   dig[16] = 0     ;
  number_razr [0]  = ~128;     // 
  number_razr [1]  = ~64;      // 
  number_razr [2]  = ~32;     //                         - 0
 }
*/
  void bcd ( real num )       //              
  { byte i=0;

   //  if (num>=1000 ) num=999;
     while (num>=100)
       { num=num-100;
          i++;
       }

     if(i==0) ind[2]=dig[16]; else ind[2]=dig[i];
      i=0;
     while (num>=10)
       { num=num-10;
          i++;
       }
     if((i==0)& (ind[2]==dig[16])) ind[1]=dig[16]; else ind[1]=dig[i];
      ind[0]=dig[(byte) num];
  }

 void show (byte name_bookmark)         //   =   

 {  switch (name_bookmark)
     {case show_enpeer : {ind[2]=en;ind[1]=pe;ind[0]=er;break;}
      case show_wepeer : {ind[2]=we;ind[1]=pe;ind[0]=er;break;}
      case show_weerye : {ind[2]=we;ind[1]=er;ind[0]=ye;break;}
      case show_enwek  : {ind[2]=de;ind[1]=en;ind[0]=we;break;}
      case show_wewek  : {ind[2]=de;ind[1]=we;ind[0]=we;break;}
      case show_depewe :  {ind[2]=de;ind[1]=pe;ind[0]=we;break;}
      case show_umin     :  {bcd(umin);break; }
      case show_umax     :  {bcd(umax);break; }
      case show_dumin_on : {bcd(dumin_on);break;}
      case show_dumax_on : {bcd(dumax_on);break;}
      case show_ondelay  : {bcd(ondelay);break; }
      case show_timer    : {bcd(bud_timer ); break;  }
      case show_uadc     : {bcd(uadc ); break;  }
      case show_d_uadc   : {bcd(d_uadc);break;}
      case show_temp      :     {bcd(temp);break;}
      default :;}
}
// Timer 0 overflow interrupt service routine
interrupt [TIM0_OVF] void timer0_ovf_isr(void)
{
   TCNT0=0xEB;                       //Reinitial timer
 #asm  ( "wdr")               // Watchdog reset

  if (n<40 )
              blink=0;
    if (n>=40)
              blink =255;
                               n++;

   if (n==80)
               { n=0; if(on_tik==1) tik++;  //  0.2       meny
                      ADCSR|=0X40 ;show(meny); }     // START ADC ,  

 if  (morg==1)
             PORTB=ind[i]&blink;
 else
             PORTB=ind[i] ;
 PORTA=  number_razr [i]&rele ;
                                i++ ;
 if (i==3)
           i=0;

 if (zap_timer==1)
 {
    if  (k<150) k++ ;
     if  (k>=150 )
        {  k=0;                           //    zap_timer=1   bud_timer ,   0
         if (bud_timer>0)
                          bud_timer -- ;
       }
 }
 DDRA=0xE1;
}

//unsigned int adc_data;
#define ADC_VREF_TYPE 0x80

// ADC interrupt service routine
 interrupt [ADC_INT] void adc_isr(void)
{
                                  // Read the AD conversion result
 uadc=(ADCW>>1)-100+d_uadc;
  if (zahvat_meny==0){if
                        ((zap_timer==1)&&(rele==254)){meny=show_timer;morg=0;}
                     else
                         { meny=show_uadc;} }
if ((uadc<=umin)||(uadc>=umax))
   {  rele=254;morg=1;
      zap_timer=0;
     bud_timer=ondelay;
      return;
    }
if ((umin_on <uadc)&& (uadc< umax_on) && (zap_timer==0))
   {  rele=254; morg=0;
      bud_timer=ondelay;zap_timer=1 ;
      return;
    }
if ( (umin_on <uadc)&& (uadc< umax_on)&& (bud_timer==0))
    {  rele=255;morg=0;
    return;}
return;
}


void var_key  (real digit,real low_lim,real high_lim)
  { temp=digit; meny=show_temp;tik=0;

    while ( min_up && plus_up && (tik==50))
    { if(min_down && plus_up)
     {
        if(digit|=low_lim){digit--;var_dig=1;}
     }
     if(min_up && plus_down)
     {
        if(digit|=high_lim){digit++;var_dig=1;}
     }
     if (var_dig==1)
      {
         temp=digit;meny=show_temp;var_dig=0;tik=0;
      }
    delay_ms(300);
    }

  }

void main(void)
{

// Func7=Out Func6=Out Func5=Out Func4=In Func3=In Func2=In Func1=In Func0=Out
// State7=1 State6=1 State5=1 State4=P State3=P State2=P State1=T State0=0
PORTA=0xFC;
DDRA=0xE1;
PORTB=0x80;
DDRB=0x7F;

// Timer/Counter 0 initialization
// Clock value: 3,906 kHz
TCCR0=0x05;
TCNT0=0xEB;
// Timer(s)/Counter(s) Interrupt(s) initialization
TIMSK=0x02;

// ADC initialization
// ADC Clock frequency: 500,000 kHz
// ADC Voltage Reference: Int., AREF discon.
ADMUX=1;              // 1-  
ADCSR=0x8B;

// Watchdog Timer initialization
// Watchdog Timer Prescaler: OSC/512k
WDTCR=0x0D;

//dig_init();
eeprom_to_ram ();
zap_timer=0;
bud_timer=ondelay;
//zahvat_meny=0;
#asm("sei")
while (1)      // 58.3% flash   
 {   tik=0;on_tik=1;zahvat_meny=0;
  while (min_down && (tik<255))
  {zahvat_meny=1;
   if ( (tik<=10) )
                    meny=show_umin;
    else {
           for (meny=1;(meny<7);meny++)      //      5  ,   +   30
           { delay_ms(5000);
                if (plus_down || (tik==255)){  tik=0;on_tik=0;break;}
             }
          ;
        }
  }
     while (plus_down){delay_ms(100);}                     //   +
           on_tik=1;
    while (plus_up||(tik==255)){delay_ms(100);}                     //   +
    if (tik==255) break;

   /*  switch (meny){
      case(1):{var_key(umin,100,190);}
      case(2):{var_key(umax,200,270);}
       case(3) :{var_key(ondelay,1,255);}
      case(4) :{var_key(dumin_on,1,9);}
         case(5)  :{var_key(dumax_on,1,9);}
          case(6) :{var_key(d_uadc,80,120);}
     default:;
      }

     tik=0;on_tik=1;zahvat_meny=1;meny=14;    */    }
































  }

